1. Technical Field
The present invention relates to a liquid crystal display and a manufacturing method therefor. More particularly the invention relates to a liquid crystal display in which there are few short circuits in the regions where the auxiliary capacity is formed, so that the auxiliary capacity can be increased without reducing the aperture ratio of each pixel, and which is suitable for relatively small pixel area or high definition, and a manufacturing method therefor.
2. Related Art
Over recent years, liquid crystal displays have been much utilized not only in information and telecommunications equipment but in electrical equipment in general. A liquid crystal display is made up of a pair of substrates of glass or the like with electrodes, etc., formed on the surfaces, and a liquid crystal layer that is formed between the pair of substrates. Applying voltage to the electrodes on the substrates causes rearrangements of the liquid crystal molecules, which in turn cause variation of the light transmissivity, and by such means the device displays various images.
Structurally, such liquid crystal displays are composed of an array substrate and a color filter substrate, with liquid crystal being sealed between the two substrates. On the surface of the array substrate, scan lines and signal lines are formed as matrices, and in the areas enclosed by such wiring lines there are formed thin film transistors (TFTs) that serve as switching elements for driving the liquid crystal, display electrodes that apply voltage to the liquid crystal, and auxiliary capacity lines that form auxiliary capacity for holding the signals. On the surface of the color filter substrate there are formed red (R), green (G) and blue (B), etc., color filters, a common electrode, and so forth.
The auxiliary capacity lines that are formed on the array substrate are provided in order to form an auxiliary capacity that will hold for a certain period the electrical charge of the signals supplied from the signal wires. Generally, the auxiliary capacity is provided by forming a capacitor that uses as electrodes the auxiliary capacity lines and part of the TFT's drain electrode or pixel electrode, and as dielectric body the gate insulating film that covers the TFT's gate electrode. The auxiliary capacity lines are generally formed from a light-blocking conductive material such as aluminum, molybdenum or chromium.
Incidentally, from the viewpoint of preventing crosstalk or flicker in the liquid crystal display, the auxiliary capacity needs to be rendered large. But since the size of the individual pixels has decreased as liquid crystal displays have become increasingly more compact and high-definition with the technological innovations of recent years, it is difficult in actual practice, when the aperture ratios of the individual pixels are considered, to effect the increased thickness of the auxiliary capacity lines themselves that would be needed in order to render the auxiliary capacity large.
The above problem is resolved by the liquid crystal display array substrate 70 that is disclosed in JP-T-2005-506575. This will now be described using FIG. 8. FIG. 8A is a plan view of the array substrate, and FIG. 8B is a cross-section along VIIIB-VIIIB in FIG. 8A. The array substrate 70 of this liquid crystal display has a transparent insulating substrate 71, on which are formed: scan lines 72 constituted of aluminum, chromium, molybdenum, chromium nitride, molybdenum nitride or an alloy, etc., of these; auxiliary capacity lines 73; and a rectangular auxiliary capacity pattern 74. The scan lines 72 are coupled to the gate electrode G of the thin film transistor (TFT), and the rectangular auxiliary capacity pattern 74 is coupled to the auxiliary capacity line 73.
On the insulating substrate 71 there is a 2500 to 4500 Å thick gate insulating film 75 of silicon nitride, silicon oxide, or similar insulative substance, which covers the scan lines 72, auxiliary capacity lines 73 and the auxiliary capacity pattern 74. Over the gate insulating film 75 there is formed a semiconductor pattern 76 of amorphous silicon or similar, which lies over the gate electrode G. Over part of the semiconductor pattern 76 and the gate insulating film 75 there are formed a signal line 77 constituted of a conductive substance, and an auxiliary capacity-use conductive pattern 78. The signal line 77 extends in the longitudinal direction, and also serves as the source electrode S for the TFT.
The auxiliary capacity-use conductive pattern 78 is formed like an island in the same layer as the signal line 77, lies over the auxiliary capacity pattern 74 located under the interposed gate insulating film 75, and forms the auxiliary capacity together with the auxiliary capacity pattern 74. The auxiliary capacity-use conductive pattern 78 is electrically coupled to the pixel electrode 79 to be described later.
Such signal line 77, auxiliary capacity-use conductive pattern 78 and semiconductor pattern 76 are covered by a 2000 to 4500 Å thick protective insulating film 80 of silicon nitride, silicon oxide, or similar insulative substance. A contact hole 81 is formed in the protective insulating film 80, on top of the drain electrode D, and an opening 82 is provided on top of the auxiliary capacity-use conductive pattern 78. Further, a pixel electrode 79 is formed on the protective insulating film 80, the pixel electrode 79 and the drain electrode D are electrically coupled via the contact hole 81, and moreover the auxiliary capacity-use conductive pattern 78 and the pixel electrode 79 are connected via the opening 82, with the result that the auxiliary capacity-use conductive pattern 78 and the drain electrode D are electrically coupled via the pixel electrode 79. The pixel electrode 79 is formed from a transparent conductive substance such as ITO (indium tin oxide) or IZO (indium zinc oxide).
Thus, in the related art, the pixel electrode 79 overlaps the auxiliary capacity line 73 and the auxiliary capacity-use conductive pattern 78, and forms an auxiliary capacity together with the auxiliary capacity line 73, with the protective insulating film 80 and gate insulating film 75 being interposed therebetween. Further, although the pixel electrode 79 is electrically coupled to the auxiliary capacity-use conductive pattern 78, the auxiliary capacity-use conductive pattern 78 forms another auxiliary capacity that is separated off by the auxiliary capacity pattern 74 and gate insulating film 75. With this arrangement, the thickness of the gate insulating film 75 interposed between the auxiliary capacity-use conductive pattern 78 and auxiliary capacity pattern 74 is small, so that a larger capacitance can be assured compared with the case where the auxiliary capacity pattern 74 forms auxiliary capacity by overlapping with the pixel electrode 79, even though the superposition area is the same. Thus, in the liquid crystal display disclosed in JP-T-2005-506575, the capacitance is increased without enlarging the area of the auxiliary capacity pattern 74 and auxiliary capacity line 73, and as a result the capacitance to aperture ratio is improved.
However, in the array substrate 70 of the liquid crystal display disclosed in JP-T-2005-506575, the capacitance (auxiliary capacity) employs the auxiliary capacity-use conductive pattern 78 and auxiliary capacity pattern 74 as electrodes, and the gate insulating film 75 provided therebetween as dielectric body; the thickness of the gate insulating film 75, although made small, is nonetheless 2500 to 4500 Å, so that in order to assure auxiliary capacity that is adequate to curb display irregularities such as crosstalk and flicker, there is no alternative but to render large the area of the auxiliary capacity pattern 74, which is constituted of a light-blocking conductive substance. In other words, in the array substrate 70 of the liquid crystal display disclosed in JP-T-2005-506575, it would be possible to make the auxiliary capacity large by reducing the thickness of the gate insulating film 75, but if the gate insulating film 75 itself was made any thinner, it would become difficult to maintain the electrical insulation between the gate electrode G and scan line 72 covered by the gate insulating film 75 on the one hand, and the other members on the other hand.
The above problems are resolved by the array substrate of the liquid crystal display 90 disclosed in Japanese Patent No.-2584290, which will now be described using FIGS. 9 and 10. FIG. 9 is a plan view of several pixel portions of the array substrate disclosed in Japanese Patent No.-2584290, and FIGS. 10A to 10G are partial cross-sectional views illustrating in sequence the process of manufacturing the array substrate. First of all an auxiliary capacity line 92 of ITO (indium tin oxide) is pattern-formed over an insulating substrate 91 constituted of glass plate. Then a gate metallic film 93 is formed and patterned (FIG. 10A).
Next, by means of plasma CVD or similar, an insulating film 94 of SiNx or SiOx, an amorphous semiconductor film 95 of for instance a-Si as an active layer, and an ohmic contact-use semiconductor film 96 constituted of for instance n+a-Si film doped with impurities, are formed one after another (FIG. 10B). At this point, the thickness A of the insulating film is made sufficiently thick—for example X=4000 Å—to ensure that no short-circuiting will occur between the drain and gate or between the source and gate.
Next, the ohmic contact-use semiconductor film 96 and the amorphous semiconductor film 95 are etched into patterns with the same resist (FIG. 10C). Then the resist (not shown in FIG. 10), which remains as aperture patterns (dash-line portions in FIG. 9) at the portions where the auxiliary capacity line 92 will overlap a display-use transparent electrode 97 to be formed in the subsequent process, is coated, and by means of the etchant for the insulating film 94, such portions are etched to the requisite thickness Y=2000 Å to serve as the auxiliary capacity insulating film (FIG. 10D).
Next, a display-use transparent electrode 97 constituted of ITO is formed and patterned (FIG. 10E). Then a metallic film 98 for drain and source is also formed and patterned (FIG. 10F), and the ohmic contact-use semiconductor film 96 that is left on the TFT channel portion is etched away, whereupon the array substrate for the liquid crystal display is complete (FIG. 10G). The liquid crystal display 90 is then obtained by opposing to each other the array substrate structured as above and a common electrode substrate, with liquid crystal substance interposed therebetween.
In such related art technology, the auxiliary capacity line 92 and pixel electrode 97 are equivalent to the electrodes of a capacitor, and the insulating film 94 located between the auxiliary capacity line 92 and pixel electrode 97 is equivalent to the dielectric body of a capacitor. Because the thickness X of the insulating film 94 over the gate electrode 93 is 4000 Å, whereas the thickness Y of the insulating film over the auxiliary capacity line 92 is made to be 2000 Å, this technology has the advantages that short circuits are unlikely to occur between the drain and gate or the source and gate, and moreover that the required auxiliary capacity can be secured even if the area of the auxiliary capacity line 92 is not enlarged.
In the array substrate 90 of the liquid crystal display disclosed in Japanese Patent No.-2584290, the surface of the auxiliary capacity line is partially etched so that the gate insulating film portion alone is rendered thin. Thereby the auxiliary capacity is increased, with electrical insulation being maintained unchanged between the gate electrode and scan line covered by the gate insulating film on the one hand, and the other members on the other hand. However, it is difficult to control the etching amount so as to render the auxiliary capacity line's gate insulating film partially thin and obtain the desired thickness thereof. It is also problematic to maintain uniformity of the thickness of the auxiliary capacity line's gate insulating film in each liquid crystal display.
The present inventors found the following method for resolving the problem of film thickness uniformity with the structure and manufacturing method of the auxiliary capacity forming means disclosed in Japanese Patent No. 2584290. First, form an insulating film of a particular thickness over the auxiliary capacity line. After that, etch away the insulating film over the auxiliary capacity lower electrode, to produce an auxiliary capacity formation region in the auxiliary capacity line. Then form another insulating film with smaller thickness than the initially provided insulating film. In this way, an insulating film that is rendered thin and moreover is of uniform thickness can be formed over the auxiliary capacity lower electrode, with the particular thickness that is required for the gate insulating film being maintained. Nevertheless, with this method, short-circuiting was observed between the auxiliary capacity lower electrode and the auxiliary capacity upper electrode opposed thereto. It was therefore problematic to adopt the method immediately.
Also with JP-A-2001-13520, an insulating film of a particular thickness is formed over the auxiliary capacity lower electrode line, after which the insulating film at the auxiliary capacity lower electrode is etched away, and then another insulating film is formed. But it seems that also with JP-A-2001-13520, short-circuiting occurs between the auxiliary capacity lower electrode and the auxiliary capacity upper electrode opposed thereto.